A hardware-efficient FIR architecture with input-data and tap folding

Li-Hsun Chen, Oscal T.-C. Chen. A hardware-efficient FIR architecture with input-data and tap folding. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 544-547, IEEE, 2005. [doi]

Authors

Li-Hsun Chen

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Oscal T.-C. Chen

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