Chichyang Chen, Paul Chow. Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor. In Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud, editors, Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007. pages 540-545, ACM, 2007. [doi]
@inproceedings{ChenC07:16,
title = {Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor},
author = {Chichyang Chen and Paul Chow},
year = {2007},
doi = {10.1145/1228784.1228912},
url = {http://doi.acm.org/10.1145/1228784.1228912},
tags = {design},
researchr = {https://researchr.org/publication/ChenC07%3A16},
cites = {0},
citedby = {0},
pages = {540-545},
booktitle = {Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007},
editor = {Hai Zhou and Enrico Macii and Zhiyuan Yan and Yehia Massoud},
publisher = {ACM},
isbn = {978-1-59593-605-9},
}