2-RAM: An In-8T-SRAM Computing Macro Featuring Multi-Bit Charge-Domain Computing and ADC-Reduction Weight Encoding

ZhiYu Chen, Qing Jin, Jingyu Wang, Yanzhi Wang, Kaiyuan Yang. 2-RAM: An In-8T-SRAM Computing Macro Featuring Multi-Bit Charge-Domain Computing and ADC-Reduction Weight Encoding. In IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2021, Boston, MA, USA, July 26-28, 2021. pages 1-6, IEEE, 2021. [doi]

Authors

ZhiYu Chen

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Qing Jin

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Jingyu Wang

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Yanzhi Wang

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Kaiyuan Yang

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