ZhiYu Chen, Qing Jin, Jingyu Wang, Yanzhi Wang, Kaiyuan Yang. 2-RAM: An In-8T-SRAM Computing Macro Featuring Multi-Bit Charge-Domain Computing and ADC-Reduction Weight Encoding. In IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2021, Boston, MA, USA, July 26-28, 2021. pages 1-6, IEEE, 2021. [doi]
@inproceedings{ChenJWWY21,
title = {2-RAM: An In-8T-SRAM Computing Macro Featuring Multi-Bit Charge-Domain Computing and ADC-Reduction Weight Encoding},
author = {ZhiYu Chen and Qing Jin and Jingyu Wang and Yanzhi Wang and Kaiyuan Yang},
year = {2021},
doi = {10.1109/ISLPED52811.2021.9502505},
url = {https://doi.org/10.1109/ISLPED52811.2021.9502505},
researchr = {https://researchr.org/publication/ChenJWWY21},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2021, Boston, MA, USA, July 26-28, 2021},
publisher = {IEEE},
isbn = {978-1-6654-3922-0},
}