Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders

Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Akella. Memory System Optimization for FPGA-Based Implementation of Quasi-Cyclic LDPC Codes Decoders. IEEE Trans. on Circuits and Systems, 58-I(1):98-111, 2011. [doi]

Abstract

Abstract is missing.