Pai-Yu Chen, Deepak Kadetotad, Zihan Xu, Abinash Mohanty, Binbin Lin, Jieping Ye, Sarma B. K. Vrudhula, Jae-sun Seo, Yu Cao, Shimeng Yu. Technology-design co-optimization of resistive cross-point array for accelerating learning algorithms on chip. In Wolfgang Nebel, David Atienza, editors, Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, DATE 2015, Grenoble, France, March 9-13, 2015. pages 854-859, ACM, 2015. [doi]
Abstract is missing.