iFPNA: A Flexible and Efficient Deep Neural Network Accelerator with a Programmable Data Flow Engine in 28nm CMOS - researchr publication authors

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Chixiao Chen, Xindi Liu, Huwan Peng, Hongwei Ding, C.-J. Richard Shi. iFPNA: A Flexible and Efficient Deep Neural Network Accelerator with a Programmable Data Flow Engine in 28nm CMOS. In 44th IEEE European Solid State Circuits Conference, ESSCIRC 2018, Dresden, Germany, September 3-6, 2018. pages 170-173, IEEE, 2018. [doi]

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