Zhenxin Chen, Jintao Li, Lin Peng, Yongfu Li, Yu Wang, Yanhan Zeng. Accelerating Comprehensive Specification Optimization of Analog Circuits Using Transient Assertions and Graph Neural Networks. In IEEE International Symposium on Circuits and Systems, ISCAS 2025, London, United Kingdom, May 25-28, 2025. pages 1-5, IEEE, 2025. [doi]
@inproceedings{ChenLPLWZ25,
title = {Accelerating Comprehensive Specification Optimization of Analog Circuits Using Transient Assertions and Graph Neural Networks},
author = {Zhenxin Chen and Jintao Li and Lin Peng and Yongfu Li and Yu Wang and Yanhan Zeng},
year = {2025},
doi = {10.1109/ISCAS56072.2025.11043434},
url = {https://doi.org/10.1109/ISCAS56072.2025.11043434},
researchr = {https://researchr.org/publication/ChenLPLWZ25},
cites = {0},
citedby = {0},
pages = {1-5},
booktitle = {IEEE International Symposium on Circuits and Systems, ISCAS 2025, London, United Kingdom, May 25-28, 2025},
publisher = {IEEE},
isbn = {979-8-3503-5683-0},
}