Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits

Jwu-E Chen, Pei-Wen Luo, Chin-Long Wey. Placement Optimization for Yield Improvement of Switched-Capacitor Analog Integrated Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 29(2):313-318, 2010. [doi]

Authors

Jwu-E Chen

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Pei-Wen Luo

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Chin-Long Wey

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