A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator

Jun Chen, Rong Luo, Huazhong Yang, Hui Wang. A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. In 19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India. pages 377-380, IEEE Computer Society, 2006. [doi]

@inproceedings{ChenLYW06,
  title = {A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator},
  author = {Jun Chen and Rong Luo and Huazhong Yang and Hui Wang},
  year = {2006},
  doi = {10.1109/VLSID.2006.15},
  url = {http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.15},
  researchr = {https://researchr.org/publication/ChenLYW06},
  cites = {0},
  citedby = {0},
  pages = {377-380},
  booktitle = {19th International Conference on VLSI Design (VLSI Design 2006), 3-7 January 2006, Hyderabad, India},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2502-4},
}