A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin

Yong Chen 0005, Pui-In Mak, Chirn Chye Boon, Rui P. Martins. A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin. IEEE Trans. on Circuits and Systems, 65(9):3014-3026, 2018. [doi]

@article{ChenMBM18,
  title = {A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin},
  author = {Yong Chen 0005 and Pui-In Mak and Chirn Chye Boon and Rui P. Martins},
  year = {2018},
  doi = {10.1109/TCSI.2018.2829725},
  url = {https://doi.org/10.1109/TCSI.2018.2829725},
  researchr = {https://researchr.org/publication/ChenMBM18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {65},
  number = {9},
  pages = {3014-3026},
}