Runtime validation of memory ordering using constraint graph checking

Kaiyu Chen, Sharad Malik, Priyadarsan Patra. Runtime validation of memory ordering using constraint graph checking. In 14th International Conference on High-Performance Computer Architecture (HPCA-14 2008), 16-20 February 2008, Salt Lake City, UT, USA. pages 415-426, IEEE Computer Society, 2008. [doi]

Authors

Kaiyu Chen

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Sharad Malik

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Priyadarsan Patra

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