Line-level incremental resynthesis techniques for FPGAs

Doris Chen, Deshanand Singh. Line-level incremental resynthesis techniques for FPGAs. In John Wawrzynek, Katherine Compton, editors, Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, FPGA 2011, Monterey, California, USA, February 27, March 1, 2011. pages 133-142, ACM, 2011. [doi]

@inproceedings{ChenS11-6,
  title = {Line-level incremental resynthesis techniques for FPGAs},
  author = {Doris Chen and Deshanand Singh},
  year = {2011},
  doi = {10.1145/1950413.1950442},
  url = {http://doi.acm.org/10.1145/1950413.1950442},
  tags = {incremental},
  researchr = {https://researchr.org/publication/ChenS11-6},
  cites = {0},
  citedby = {0},
  pages = {133-142},
  booktitle = {Proceedings of the ACM/SIGDA 19th International Symposium on Field Programmable Gate Arrays, FPGA 2011, Monterey, California, USA, February 27, March 1, 2011},
  editor = {John Wawrzynek and Katherine Compton},
  publisher = {ACM},
  isbn = {978-1-4503-0554-9},
}