Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis

Tse-Wei Chen, Chi-Sun Tang, Sung-Fang Tsai, Chen-Han Tsai, Shao-Yi Chien, Liang-Gee Chen. Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis. In IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings. pages 491-494, IEEE, 2009. [doi]

@inproceedings{ChenTTTCC09,
  title = {Tera-scale performance machine learning SoC with dual stream processor architecture for multimedia content analysis},
  author = {Tse-Wei Chen and Chi-Sun Tang and Sung-Fang Tsai and Chen-Han Tsai and Shao-Yi Chien and Liang-Gee Chen},
  year = {2009},
  doi = {10.1109/CICC.2009.5280791},
  url = {http://dx.doi.org/10.1109/CICC.2009.5280791},
  researchr = {https://researchr.org/publication/ChenTTTCC09},
  cites = {0},
  citedby = {0},
  pages = {491-494},
  booktitle = {IEEE Custom Integrated Circuits Conference, CICC 2009, San Jose, California, USA, 13-16 September, 2009, Proceedings},
  publisher = {IEEE},
  isbn = {978-1-4244-4071-9},
}