Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs

Po-Chih Chen, Yi-Ting Wu, Meng-Hsueh Chiang. Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs. In 53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, September 11-14, 2023. pages 73-76, IEEE, 2023. [doi]

@inproceedings{ChenWC23-7,
  title = {Performance Comparison of SRAM Designs Implemented with Silicon-On-Insulator Nanosheet Transistors and Bulk FinFETs},
  author = {Po-Chih Chen and Yi-Ting Wu and Meng-Hsueh Chiang},
  year = {2023},
  doi = {10.1109/ESSDERC59256.2023.10268558},
  url = {https://doi.org/10.1109/ESSDERC59256.2023.10268558},
  researchr = {https://researchr.org/publication/ChenWC23-7},
  cites = {0},
  citedby = {0},
  pages = {73-76},
  booktitle = {53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, September 11-14, 2023},
  publisher = {IEEE},
  isbn = {979-8-3503-0423-7},
}