A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS

Wei-Chih Chen, Chin-Hua Wen, Chin-Ming Fu, Tsung-Hsien Tsai, Yu-Chi Chen, Wen-Hung Huang, Chien-Chun Tsai, Alvin L.-S. Loke, C. H. Kenny. A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS. In IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020. pages 1-2, IEEE, 2020. [doi]

@inproceedings{ChenWFTCHTLK20,
  title = {A 4-to-18GHz Active Poly Phase Filter Quadrature Clock Generator with Phase Error Correction in 5nm CMOS},
  author = {Wei-Chih Chen and Chin-Hua Wen and Chin-Ming Fu and Tsung-Hsien Tsai and Yu-Chi Chen and Wen-Hung Huang and Chien-Chun Tsai and Alvin L.-S. Loke and C. H. Kenny},
  year = {2020},
  doi = {10.1109/VLSICircuits18222.2020.9162794},
  url = {https://doi.org/10.1109/VLSICircuits18222.2020.9162794},
  researchr = {https://researchr.org/publication/ChenWFTCHTLK20},
  cites = {0},
  citedby = {0},
  pages = {1-2},
  booktitle = {IEEE Symposium on VLSI Circuits, VLSI Circuits 2020, Honolulu, HI, USA, June 16-19, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-9942-9},
}