A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier

Yongzhen Chen, Jingjing Wang, Hang Hu, Fan Ye, Junyan Ren. A 200MS/s, 11 bit SAR-assisted pipeline ADC with bias-enhanced ring amplifier. In IEEE International Symposium on Circuits and Systems, ISCAS 2017, Baltimore, MD, USA, May 28-31, 2017. pages 1-4, IEEE, 2017. [doi]

Authors

Yongzhen Chen

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Jingjing Wang

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Hang Hu

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Fan Ye

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Junyan Ren

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