A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection

Poki Chen, Joshua Adiel Wijaya, Seiji Kajihara, Trio Adiono, Hsiang-Yu Chen, Ruei-Ting Wang, Yousuke Miyake. A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection. IEEE Access, 10:126429-126439, 2022. [doi]

Abstract

Abstract is missing.