Jifeng Chen, Shuo Wang, Mohammad Tehranipoor. Efficient selection and analysis of critical-reliability paths and gates. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 45-50, ACM, 2012. [doi]
@inproceedings{ChenWT12-0,
title = {Efficient selection and analysis of critical-reliability paths and gates},
author = {Jifeng Chen and Shuo Wang and Mohammad Tehranipoor},
year = {2012},
doi = {10.1145/2206781.2206793},
url = {http://doi.acm.org/10.1145/2206781.2206793},
researchr = {https://researchr.org/publication/ChenWT12-0},
cites = {0},
citedby = {0},
pages = {45-50},
booktitle = {Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012},
editor = {Erik Brunvard and Ken Stevens and Joseph R. Cavallaro and Tong Zhang 0002},
publisher = {ACM},
isbn = {978-1-4503-1244-8},
}