Chia-I. Chen, Chin-Yeh Yu, Yen-Ju Lu, Chi-Feng Wu. Apply high-level synthesis design and verification methodology on floating-point unit implementation. In Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2014, Hsinchu, Taiwan, April 28-30, 2014. pages 1-4, IEEE, 2014. [doi]
Abstract is missing.