Chixiao Chen, Jieming Yin, Yarui Peng, Maurizio Palesi, Wenxu Cao, Letian Huang, Amit Kumar Singh 0002, Haocong Zhi, Xiaohang Wang 0001. Design Challenges of Intrachiplet and Interchiplet Interconnection. IEEE Design & Test of Computers, 39(6):99-109, 2022. [doi]
@article{ChenYPPCH0Z022,
title = {Design Challenges of Intrachiplet and Interchiplet Interconnection},
author = {Chixiao Chen and Jieming Yin and Yarui Peng and Maurizio Palesi and Wenxu Cao and Letian Huang and Amit Kumar Singh 0002 and Haocong Zhi and Xiaohang Wang 0001},
year = {2022},
doi = {10.1109/MDAT.2022.3203005},
url = {https://doi.org/10.1109/MDAT.2022.3203005},
researchr = {https://researchr.org/publication/ChenYPPCH0Z022},
cites = {0},
citedby = {0},
journal = {IEEE Design & Test of Computers},
volume = {39},
number = {6},
pages = {99-109},
}