Strained Si Nanosheet pFET Based on SiC Strain Relaxed Buffer Layer for High Performance and Low Power Logic Applications

Kun Chen, Jingwen Yang, Chunlei Wu, Chen Wang, Min Xu, David Wei Zhang. Strained Si Nanosheet pFET Based on SiC Strain Relaxed Buffer Layer for High Performance and Low Power Logic Applications. IEEE Access, 11:65491-65495, 2023. [doi]

Abstract

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