Design and Verification of High Performance Memory Interface Based on AXI Bus - researchr publication authors

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Ming Chen, Zhifeng Zhang, Haoqi Ren. Design and Verification of High Performance Memory Interface Based on AXI Bus. In 21st International Conference on Communication Technology, ICCT 2021, Tianjin, China, October 13-16, 2021. pages 695-699, IEEE, 2021. [doi]

This author has not been identified. Look up 'Ming Chen' in GoogleThis author has not been identified. Look up 'Zhifeng Zhang' in GoogleThis author has not been identified. Look up 'Haoqi Ren' in Google

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