Kuo-Hsing Cheng, Shun-Wen Cheng. 64-Bit High-Performance Power-Aware Conditional Carry Adder Design. IEICE Transactions, 88-C(6):1322-1331, 2005. [doi]
@article{ChengC05:5,
title = {64-Bit High-Performance Power-Aware Conditional Carry Adder Design},
author = {Kuo-Hsing Cheng and Shun-Wen Cheng},
year = {2005},
doi = {10.1093/ietele/e88-c.6.1322},
url = {http://dx.doi.org/10.1093/ietele/e88-c.6.1322},
tags = {context-aware, design},
researchr = {https://researchr.org/publication/ChengC05%3A5},
cites = {0},
citedby = {0},
journal = {IEICE Transactions},
volume = {88-C},
number = {6},
pages = {1322-1331},
}