A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process

Kuo-Hsing Cheng, Kai-Fei Chang, Yu-lung Lo, Ching-Wen Lai, Yuh-Kuang Tseng. A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]

@inproceedings{ChengCYLT06,
  title = {A 100MHz-1GHz adaptive bandwidth phase-locked loop in 90nm process},
  author = {Kuo-Hsing Cheng and Kai-Fei Chang and Yu-lung Lo and Ching-Wen Lai and Yuh-Kuang Tseng},
  year = {2006},
  doi = {10.1109/ISCAS.2006.1693307},
  url = {http://dx.doi.org/10.1109/ISCAS.2006.1693307},
  researchr = {https://researchr.org/publication/ChengCYLT06},
  cites = {0},
  citedby = {0},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
  publisher = {IEEE},
}