Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique

Ching-Hwa Cheng, Jiun-In Guo. Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique. In 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020. pages 1-2, IEEE, 2020. [doi]

Authors

Ching-Hwa Cheng

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Jiun-In Guo

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