Ching-Hwa Cheng, Jiun-In Guo. Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique. In 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020. pages 1-2, IEEE, 2020. [doi]
@inproceedings{ChengG20,
title = {Low-Power 3D-PCB Stacking System Design and Validation by Automatic Voltage-Current Scalable Technique},
author = {Ching-Hwa Cheng and Jiun-In Guo},
year = {2020},
doi = {10.1109/VLSI-DAT49148.2020.9196244},
url = {https://doi.org/10.1109/VLSI-DAT49148.2020.9196244},
researchr = {https://researchr.org/publication/ChengG20},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020},
publisher = {IEEE},
isbn = {978-1-7281-6083-2},
}