EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors

Hsiang-Yun Cheng, Matt Poremba, Narges Shahidi, Ivan Stalev, Mary Jane Irwin, Mahmut T. Kandemir, Jack Sampson, Yuan Xie 0001. EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors. TACO, 12(2):17, 2015. [doi]

@article{ChengPSSIKS015,
  title = {EECache: A Comprehensive Study on the Architectural Design for Energy-Efficient Last-Level Caches in Chip Multiprocessors},
  author = {Hsiang-Yun Cheng and Matt Poremba and Narges Shahidi and Ivan Stalev and Mary Jane Irwin and Mahmut T. Kandemir and Jack Sampson and Yuan Xie 0001},
  year = {2015},
  doi = {10.1145/2756552},
  url = {http://doi.acm.org/10.1145/2756552},
  researchr = {https://researchr.org/publication/ChengPSSIKS015},
  cites = {0},
  citedby = {0},
  journal = {TACO},
  volume = {12},
  number = {2},
  pages = {17},
}