CK::::V::dd::::::: A Clock-Controlled Self-Stabilized Voltage Technique for Reducing Dynamic Power in CMOS Digital Circuits

Ching-Hwa Cheng, Chin-Hsien Wang. CK::::V::dd::::::: A Clock-Controlled Self-Stabilized Voltage Technique for Reducing Dynamic Power in CMOS Digital Circuits. IEICE Transactions, 92-C(4):391-400, 2009. [doi]

Abstract

Abstract is missing.