A low power based system partitioning and binding technique for multi-chip module architectures

Raghava V. Cherabuddi, Magdy A. Bayoumi, H. Krishnamurthy. A low power based system partitioning and binding technique for multi-chip module architectures. In 7th Great Lakes Symposium on VLSI (GLS-VLSI 97), 13-15 March 1997, Urbana, IL, USA. pages 156-162, IEEE Computer Society, 1997. [doi]

@inproceedings{CherabuddiBK97,
  title = {A low power based system partitioning and binding technique for multi-chip module architectures},
  author = {Raghava V. Cherabuddi and Magdy A. Bayoumi and H. Krishnamurthy},
  year = {1997},
  url = {http://csdl.computer.org/comp/proceedings/glsvlsi/1997/7904/00/79040156abs.htm},
  tags = {architecture, partitioning},
  researchr = {https://researchr.org/publication/CherabuddiBK97},
  cites = {0},
  citedby = {0},
  pages = {156-162},
  booktitle = {7th Great Lakes Symposium on VLSI (GLS-VLSI  97), 13-15 March 1997, Urbana, IL, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-7904-2},
}