Zouha Cherif, Jean-Luc Danger, Florent Lozach, Yves Mathieu, Lilian Bossuet. Evaluation of delay PUFs on CMOS 65 nm technology: ASIC vs FPGA. In Ruby B. Lee, Weidong Shi, editors, HASP 2013, The Second Workshop on Hardware and Architectural Support for Security and Privacy, Tel-Aviv, Israel, June 23-24, 2013. pages 4, ACM, 2013. [doi]
Abstract is missing.