FALPEM: Framework for Architectural-Level Power Estimation and Optimization for Large Memory Sub-Systems

Amit Chhabra, Harsh Rawat, Mohit Jain, Pascal Tessier, Daniel Pierredon, Laurent Bergher, Promod Kumar. FALPEM: Framework for Architectural-Level Power Estimation and Optimization for Large Memory Sub-Systems. IEEE Trans. on CAD of Integrated Circuits and Systems, 34(7):1138-1142, 2015. [doi]

@article{ChhabraRJTPBK15,
  title = {FALPEM: Framework for Architectural-Level Power Estimation and Optimization for Large Memory Sub-Systems},
  author = {Amit Chhabra and Harsh Rawat and Mohit Jain and Pascal Tessier and Daniel Pierredon and Laurent Bergher and Promod Kumar},
  year = {2015},
  doi = {10.1109/TCAD.2014.2387859},
  url = {http://dx.doi.org/10.1109/TCAD.2014.2387859},
  researchr = {https://researchr.org/publication/ChhabraRJTPBK15},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {34},
  number = {7},
  pages = {1138-1142},
}