An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures

Hsin-Chou Chi, Chia-Ming Wu. An Efficient Scheduler for Circuit-Switched Network-on-Chip Architectures. In IFIP VLSI-SoC 2006, IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Nice, France, 16-18 October 2006. pages 68-73, IEEE, 2006. [doi]

Abstract

Abstract is missing.