Koken Chin, Yuta Mishima, Yuki Watanabe, Hiroyuki Tsuchiya, Hao San, Tatsuji Matsuura, Masao Hotta. A 12-Bit 3.3MS/S pipeline cyclic ADC with correlated level shifting technique. In 2017 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2017, Xiamen, China, November 6-9, 2017. pages 602-605, IEEE, 2017. [doi]
Abstract is missing.