Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization

De-Shiuan Chiou, Da-Cheng Juan, Yu-Ting Chen, Shih-Chieh Chang. Fine-Grained Sleep Transistor Sizing Algorithm for Leakage Power Minimization. In Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007. pages 81-86, IEEE, 2007. [doi]

Authors

De-Shiuan Chiou

This author has not been identified. Look up 'De-Shiuan Chiou' in Google

Da-Cheng Juan

This author has not been identified. Look up 'Da-Cheng Juan' in Google

Yu-Ting Chen

This author has not been identified. Look up 'Yu-Ting Chen' in Google

Shih-Chieh Chang

This author has not been identified. Look up 'Shih-Chieh Chang' in Google