Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge Tonfat, Ricardo Reis. Soft-Error Probability Due to SET in Clock Tree Networks. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012, Amherst, MA, USA, August 19-21, 2012. pages 338-343, IEEE, 2012. [doi]
@inproceedings{ChipanaCKTR12,
title = {Soft-Error Probability Due to SET in Clock Tree Networks},
author = {Raul Chipana and Eduardo Chielle and Fernanda Lima Kastensmidt and Jorge Tonfat and Ricardo Reis},
year = {2012},
doi = {10.1109/ISVLSI.2012.39},
url = {http://dx.doi.org/10.1109/ISVLSI.2012.39},
researchr = {https://researchr.org/publication/ChipanaCKTR12},
cites = {0},
citedby = {0},
pages = {338-343},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012, Amherst, MA, USA, August 19-21, 2012},
publisher = {IEEE},
isbn = {978-1-4673-2234-8},
}