Metal-layer capacitors in the 65 nm CMOS process and the application for low-leakage power-rail ESD clamp circuit

Po-Yen Chiu, Ming-Dou Ker. Metal-layer capacitors in the 65 nm CMOS process and the application for low-leakage power-rail ESD clamp circuit. Microelectronics Reliability, 54(1):64-70, 2014. [doi]

Abstract

Abstract is missing.