A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors

Po-Wei Chiu, Chris H. Kim. A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors. IEEE Trans. Circuits Syst. I Regul. Pap., 69(5):1943-1951, 2022. [doi]

Abstract

Abstract is missing.