A 6-Gb/s adaptive-loop-bandwidth clock and data recovery (CDR) circuit

Li-Hung Chiueh, Tai-Cheng Lee. A 6-Gb/s adaptive-loop-bandwidth clock and data recovery (CDR) circuit. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014. pages 289-292, IEEE, 2014. [doi]

@inproceedings{ChiuehL14,
  title = {A 6-Gb/s adaptive-loop-bandwidth clock and data recovery (CDR) circuit},
  author = {Li-Hung Chiueh and Tai-Cheng Lee},
  year = {2014},
  doi = {10.1109/ASSCC.2014.7008917},
  url = {http://dx.doi.org/10.1109/ASSCC.2014.7008917},
  researchr = {https://researchr.org/publication/ChiuehL14},
  cites = {0},
  citedby = {0},
  pages = {289-292},
  booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2014, KaoHsiung, Taiwan, November 10-12, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-4090-5},
}