3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS

Woo-seok Choi, Guanghua Shu, Mrunmay Talegaonkar, Yubo Liu, Da Wei, Luca Benini, Pavan Kumar Hanumolu. 3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS. In 2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015. pages 1-3, IEEE, 2015. [doi]

@inproceedings{ChoiSTLWBH15,
  title = {3.8 A 0.45-to-0.7V 1-to-6Gb/S 0.29-to-0.58pJ/b source-synchronous transceiver using automatic phase calibration in 65nm CMOS},
  author = {Woo-seok Choi and Guanghua Shu and Mrunmay Talegaonkar and Yubo Liu and Da Wei and Luca Benini and Pavan Kumar Hanumolu},
  year = {2015},
  doi = {10.1109/ISSCC.2015.7062928},
  url = {http://dx.doi.org/10.1109/ISSCC.2015.7062928},
  researchr = {https://researchr.org/publication/ChoiSTLWBH15},
  cites = {0},
  citedby = {0},
  pages = {1-3},
  booktitle = {2015 IEEE International Solid-State Circuits Conference, ISSCC 2015, Digest of Technical Papers, San Francisco, CA, USA, February 22-26, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-6224-2},
}