Pei-Yuan Chou, I-Chen Wu, Jai-Wei Lin, Xuan-Yu Lin, Tien-Fu Chen, Tay-Jyi Lin, Jinn-Shyan Wang. Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches. In 2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015. pages 1-4, IEEE, 2015. [doi]
@inproceedings{ChouWLLCLW15,
title = {Low-cost low-power droop-voltage-aware delay-fault-prevention designs for DVS caches},
author = {Pei-Yuan Chou and I-Chen Wu and Jai-Wei Lin and Xuan-Yu Lin and Tien-Fu Chen and Tay-Jyi Lin and Jinn-Shyan Wang},
year = {2015},
doi = {10.1109/ASICON.2015.7517050},
url = {https://doi.org/10.1109/ASICON.2015.7517050},
researchr = {https://researchr.org/publication/ChouWLLCLW15},
cites = {0},
citedby = {0},
pages = {1-4},
booktitle = {2015 IEEE 11th International Conference on ASIC, ASICON 2015, Chengdu, China, November 3-6, 2015},
publisher = {IEEE},
isbn = {978-1-4799-8485-5},
}