A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process - researchr publication authors

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Wen-Shen Chou, Shu-Chieh Yang, Fu-Lung Hsueh, Heng-Chang Huang, Chih-Ji Hsiao. A Low-Cost Triple-Channel 10-bit 250MHz DAC IP in 65nm CMOS Process. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 3594-3597, IEEE, 2007. [doi]

This author has not been identified. Look up 'Wen-Shen Chou' in GoogleThis author has not been identified. Look up 'Shu-Chieh Yang' in GoogleThis author has not been identified. Look up 'Fu-Lung Hsueh' in GoogleThis author has not been identified. Look up 'Heng-Chang Huang' in GoogleThis author has not been identified. Look up 'Chih-Ji Hsiao' in Google

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