A configurable length, Fused Multiply-Add floating point unit for a VLIW processor

Vassilios A. Chouliaras, Konstantinos Manolopoulos, Dionysios I. Reisis. A configurable length, Fused Multiply-Add floating point unit for a VLIW processor. In Annual IEEE International SoC Conference, SoCC 2009, September 9-11, 2009, Belfast, Northern Ireland, UK, Proceedings. pages 93-96, IEEE, 2009. [doi]

Authors

Vassilios A. Chouliaras

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Konstantinos Manolopoulos

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Dionysios I. Reisis

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