A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks - researchr publication authors

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Steinar Thune Christensen, Snorre Aunet, Omer Qadir. A Configurable and Versatile Architecture for Low Power, Energy Efficient Hardware Acceleration of Convolutional Neural Networks. In Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Röning, editors, 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip (SoC), Helsinki, Finland, October 29-30, 2019. pages 1-6, IEEE, 2019. [doi]

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