Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems

Wei-Ching Chu, Huai-Ting Li, Ching-Yao Chou, An-Yeu Andy Wu. Variation-aware core-level redundancy scheme for reliable DSP computation in multi-core systems. In 2015 IEEE Workshop on Signal Processing Systems, SiPS 2015, Hangzhou, China, October 14-16, 2015. pages 1-5, IEEE, 2015. [doi]

Abstract

Abstract is missing.