Refactoring of Timing Graphs and Its Use in Capturing Topological Correlation in SSTA

Jaeyong Chung, Jacob A. Abraham. Refactoring of Timing Graphs and Its Use in Capturing Topological Correlation in SSTA. IEEE Trans. on CAD of Integrated Circuits and Systems, 31(4):485-496, 2012. [doi]

@article{ChungA12,
  title = {Refactoring of Timing Graphs and Its Use in Capturing Topological Correlation in SSTA},
  author = {Jaeyong Chung and Jacob A. Abraham},
  year = {2012},
  doi = {10.1109/TCAD.2011.2176731},
  url = {http://dx.doi.org/10.1109/TCAD.2011.2176731},
  researchr = {https://researchr.org/publication/ChungA12},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {31},
  number = {4},
  pages = {485-496},
}