A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS

Yung-Hui Chung, Chia-Hui Tien, Qi-Feng Zeng. A 102dB-SFDR 16-bit Calibration-Free SAR ADC in 180-nm CMOS. In 2019 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2019, Bangkok, Thailand, November 11-14, 2019. pages 5-8, IEEE, 2019. [doi]

Authors

Yung-Hui Chung

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Chia-Hui Tien

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Qi-Feng Zeng

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