Mark J. Cianchetti, David H. Albonesi. A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors. JETC, 7(2):9, 2011. [doi]
@article{CianchettiA11,
title = {A low-latency, high-throughput on-chip optical router architecture for future chip multiprocessors},
author = {Mark J. Cianchetti and David H. Albonesi},
year = {2011},
doi = {10.1145/1970406.1970411},
url = {http://doi.acm.org/10.1145/1970406.1970411},
tags = {architecture, routing},
researchr = {https://researchr.org/publication/CianchettiA11},
cites = {0},
citedby = {0},
journal = {JETC},
volume = {7},
number = {2},
pages = {9},
}