Handel-C Design Enhancement for FPGA-Based DV Decoder

Slawomir Cichon, Marek Gorgon, Miroslaw Pac. Handel-C Design Enhancement for FPGA-Based DV Decoder. In Koen Bertels, João M. P. Cardoso, Stamatis Vassiliadis, editors, Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers. Volume 3985 of Lecture Notes in Computer Science, pages 128-133, Springer, 2006. [doi]

@inproceedings{CichonGP06,
  title = {Handel-C Design Enhancement for FPGA-Based DV Decoder},
  author = {Slawomir Cichon and Marek Gorgon and Miroslaw Pac},
  year = {2006},
  doi = {10.1007/11802839_18},
  url = {http://dx.doi.org/10.1007/11802839_18},
  tags = {rule-based, C++, design},
  researchr = {https://researchr.org/publication/CichonGP06},
  cites = {0},
  citedby = {0},
  pages = {128-133},
  booktitle = {Reconfigurable Computing: Architectures and Applications, Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers},
  editor = {Koen Bertels and João M. P. Cardoso and Stamatis Vassiliadis},
  volume = {3985},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
}