Verification of gate-level arithmetic circuits by function extraction

Maciej J. Ciesielski, Cunxi Yu, Walter Brown, Duo Liu, André Rossi. Verification of gate-level arithmetic circuits by function extraction. In Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015. pages 52, ACM, 2015. [doi]

@inproceedings{CiesielskiYBLR15,
  title = {Verification of gate-level arithmetic circuits by function extraction},
  author = {Maciej J. Ciesielski and Cunxi Yu and Walter Brown and Duo Liu and André Rossi},
  year = {2015},
  doi = {10.1145/2744769.2744925},
  url = {http://doi.acm.org/10.1145/2744769.2744925},
  researchr = {https://researchr.org/publication/CiesielskiYBLR15},
  cites = {0},
  citedby = {0},
  pages = {52},
  booktitle = {Proceedings of the 52nd Annual Design Automation Conference, San Francisco, CA, USA, June 7-11, 2015},
  publisher = {ACM},
  isbn = {978-1-4503-3520-1},
}